1. Field of the Invention
This invention relates to improvements of print circuit boards and the production method thereof, and, in particular, relates to a multilayer print circuit board having a laminated structure, wherein at least an inner print circuit pattern and an outer print circuit pattern for mounting surface mount devices are laminated on a substrate being insulated by an insulation layer interposed there-between, and are electrically connected to each other through a blind hole provided in the insulation layer.
1. Description of the Related Arts
Recently, multilayer print circuit boards used for various kinds of electronic products have been developed as the technology of high density electric circuit construction is advanced. The multilayer print circuit boards have a plurality of electrically conductive printed circuit patterns being electrically insulated by insulation layers each interposed between the neighboring printed circuit patterns.
As an example of the production method in these kinds of multilayer print circuit boards, there is disclosed a production method in the Japanese Patent Publication H5-37360/1993, wherein an inner print circuit pattern is provided on a surface of a substrate overlaid by an insulation layer on which an outer print circuit pattern is further provided, and the inner and outer circuit patterns are electrically connected to each other through a blind hole provided in the insulation layer.
FIG. 1 is a sectional view showing a multilayer print circuit board in the prior art.
A brief description is given of a multilayer print circuit board 100 in the prior art (the Japanese Patent Publication H5-37360/1993) in reference with FIG. 1.
After grinding a surface of a substrate 101, an inner print circuit pattern (referred to as an inner circuit pattern) 102 is formed on the surface thereof. Then, a surface of the inner circuit pattern is grained by using a copper surface oxidization agent. An insulation layer 103 and a bond layer 104 having a thickness of 2 to 3 .mu.m provided for an electroless plating are respectively laminated on the inner circuit pattern 102 by coating and heat curing in the order.
After an electroless plating resist layer 105 has been formed on a surface of the cured bond layer 104 by screen-printing an ink pattern as a plating resist, it is cured by heat. Blind hole 106 for electrically connecting inner and outer circuit patterns is formed by using a carbonic acid gas laser, and a through hole 107 adjacent to the blind hole 106 by drilling.
After that, in order to enhance adhesion in the electroless plating and as a smea treatment to a wall surface of the through hole 107 for removing a fused layer formed therein, a chemical roughing treatment is given to the insulation layer 103 exposed to the air, the bond layer 104 for electroless plating and an insulation material portion of the substrate 101 by using a solution of dichromic acid/sulfuric acid/sodium fluoride. Next, an outer circuit pattern 108 is formed on the insulation layer 103 by the electroless plating. At that time, conductive layers are also formed on the surfaces of the blind hole 106 and the through hole 107 thereby, wherein a land 109 is also formed for connecting the inner circuit pattern 102 to the through hole 107.
According to the production method of the multilayer print circuit board 100 in the prior art, both the inner circuit pattern 102 and the outer circuit pattern 108 can be electrically connected through the land 109 formed on the surface of the blind hole 106. However, in the prior art the solution of dichromic acid/sulfuric acid/sodium fluoride is used for the chemical roughing treatment to enhance adherence of electroless plating as mentioned in the foregoing. This causes serious problems in view of the environmental protection as follows.
(a) Dichromic acid (chromium (VI)) is designated as an harmful material under the water-pollution preventing law, and there are some regions where the use of dichromic acid is prohibited. PA1 (b) The system for removing the chromium (VI) contained in wastewater is complicated, and there enforced a severe disposal standard of not more than 0.5 mg/l under the water-pollution preventing law. PA1 (c) The handling of polluted mud containing the chromium (VI) is very difficult, and further a severer restriction law is anticipated in future.
On the other hand, when fluoride such as sodium fluoride is used, the system for removing the fluoride contained in wastewater becomes complicated, resulting in high running cost.
Accordingly, upon performing the chemical roughing treatment on the insulation layers formed on the substrate, there are desired a multilayer print circuit board and the production method thereof capable of readily forming the blind hole for electrically connecting the inner and outer circuit patterns from the outer surface of the insulation layer without using harmful materials.
On the other hand, in apparatuses employing digital circuits such as communication apparatuses and digital computers, there arises a problem that noises generated by these apparatuses give interferences to other peripheral devices and apparatuses. As the countermeasure for suppressing the noises, there has been increased a demand for providing a signal carrying pattern being underneath a power source circuit layer and/or a ground circuit layer for better shielding effect because they are made of metal layers, however, it is not an easy task. Contrary to the demand, surface mount devices such as a QFP (Quad Flat Package), a board-to-board wiring (a connector) and a bare-chip need to be mounted on lands of the outer circuit pattern at a fine space interval of 0.3 to 0.4 mm. In this case, the connection method between the outer circuit pattern having lands and the inner circuit patterns including the signal carrying pattern, the power source circuit pattern and the ground circuit pattern is a very important to design the multilayer print circuit board in view of the high parts mounting density and cost reduction thereof.